module board(
    input  clk_i,
    input  rst,
    input [23:0] io_sw,
    
    output led_ca ,
    output led_cb ,
    output led_cc ,
    output led_cd ,
    output led_ce ,
    output led_cf ,
    output led_cg ,
    output led_dp ,
    output [7:0]  led_en,
    output [23:0] io_led
    );
    
    wire rst_n = !rst;
    wire clk;
    
    
    cpuclk UCLK(
        .clk_in1    (clk_i),
        .clk_out1   (clk)
    );
    
    myCPU U_myCPU(
        .clk    (clk),
        .rst_n  (rst_n),
        .io_sw  (io_sw),
        .io_led (io_led)
    );
    
    led_display_ctrl U_led_display_ctrl(
        .clk        (clk),
        .rst_n      (rst_n),
        .cal_result (io_led),
        .led_en     (led_en),
        .led_ca     (led_ca),
        .led_cb     (led_cb),
        .led_cc     (led_cc),
        .led_cd     (led_cd),
        .led_ce     (led_ce),
        .led_cf     (led_cf),
        .led_cg     (led_cg),
        .led_dp     (led_dp)
    );
    
endmodule
